Log

The Log manual was originally written in a hypertext system that Dave Gillespie wrote for the HP 9836C systems at Caltech. Dave also wrote the manual. The manual was translated into raw ASCII during the Unix port. The following version of the manual returns the hyperlinks to parts of the document. Eventually, the entire manual will have the look-and-feel of the General Information section.

The Log Reference Manual

Other Documents for Analog Users

The Log reference manual above covers all aspects of the Log system. Users only interest in circuit simulation may want to first read some of the following documents.

Postscript manual
Michael Godfrey converted parts of the Log manual into a guide for analog simulation users, in Postscript. Press here to view the document. This document does not include information on the new FET7 transistor models (see below).
Interactive lessons
A series of 5 annotated circuit schematics, log/lib/lesson1.lgf through log/lib/lesson5.lgf, form an interactive way to learn about Analog by using Analog. Developed by Dave Gillespie.
Pocket reference
A set of 28 tips for the novice Analog user. Most ways novices get stuck while learning Analog are in this guide, written by Dave Gillespie.
Device model details
The new FET7 series MOS models are explained and characterized in this paper [Adobe PDF, 680 KByte, requires Acroread 3.0] by Michael Godfrey and John Lazzaro (draft 2.2). The obsolete FET5/FET6 models are described in this paper by Michael Godfrey. Jamie Honan has written a document describing the diode model used in analog; press here to read this document.
Simulation engine details
For information on how the simulation engine in analog works, see this Postscript document by John Lazzaro -- note the transistor models described in this document are no longer used in analog. The models described are the obsolete NFET4 and PFET4 gates, included in analog only for backwards compatibility.
Adding new gates to Analog
I'm often asked how to add new gates to analog. I've prepared this description of the process.

For Advanced Users

Advanced users will want to check out the examples package, which contains a VLSI chip design and an Actel FPGA design. These examples show Log in use in a practical way. Press here for information on picking up the examples package.

Email
lazzaro@cs.berkeley.edu
Phone
(510) 643 4005
SMail
UC Berkeley / CS Division / 387 Soda Hall / Berkeley CA 94720